[Select]

Dynamic Areas


Index

 

Dynamic area changes

From Kernel 9.06 onward there are a number of new dynamic areas which are provided by the operating system. These areas provide a legitimate mechanism for locating previously fixed regions of memory. The full list of dynamic areas is as follows :

    -1      Application space
     0       System Heap
     1       Relocatable Module Area (RMA)
     2       Screen Area
     3       Sprite Area
     4       Font Cache
     5       RAM Filing System
     6       Free pool
     7       VRAM rescue
     8       Kernel buffers
     9       Reserved for future expansion
     10      Abort SVC and IRQ stack copy
     11      Operating system ROM
     12      SWI dispatch and IRQ workspace
     13      SVC stack
     14      IRQ stack
     15      UND stack
     16      Level 2 Page Tables
     17      Operating system page tables (SoftCAM)
     256+   User dynamic area

Each of these areas is described below. Where not expressly stated below, the address and size of the regions is variable with OS versions.

System heap

The system heap is a private area used by the Operating System for allocation of structures vital to the system's operation. This includes, but it not restricted to :

  • Timer information
  • Dynamic area information
  • Module information
  • Dispatch hashes and tables

Under earlier versions of the Kernel, the system heap was writable in USR mode. This has been changed in order to improve system stability by making the region read-only in USR mode.

Under earlier versions of the Kernel, the system heap was used for system variable management and as FileSwitch workspace. This has been changed to remove such collusion. System variables (and the entire system variable system) is now managed by the SystemVars module. FileSwitch now uses a private dynamic area for its memory allocation.

These changes have meant that the system heap no longer needs to be as large as it has been under earlier versions of the OS. It has been reduced in size from just under 3M to just under 2M.

The system heap does not contain any executable components and may be outside of 26 bit space on 26 bit systems in future.

Relocatable Module Area

The RMA is unchanged in operation. On 26 bit systems it will remain within 26 bit space. On 32bit systems it will remain within 31 bit space (that is, it will not have an address which is negative if used in a signed context).

Screen Area

The Screen area is no longer provided by the Kernel. The LegacyScreen module provides a fake implementation of the screen area to ensure that clients which read the dynamic area do not fail. The contents of the area are not, however, the screen. Access to the screen should only be performed through the defined values returned by OS_ReadVduVariables.

System Sprite area

The system sprite area has, since Select, been managed by the SpriteUtils module. Its contents should be considered private to SpriteUtils.

Font cache

The font cache area has, since Select 2, been managed by the FontManager module. Its contents should be considered private to FontManager.

RAM filing system

The RAM filing system has, since Select 3, been managed by the RAMFS module. Its contents should be considered private to RAMFS.

Free pool

The free pool is unchanged in behaviour. This may change in the future.

VRAM Rescue

The VRAM rescue area was used under RISC OS 4 (and Select 1-3) to provide a mechanism for returning slower VRAM pages to the free pool, replacing them with DRAM. Since VRAM is now managed solely by the video driver modules, it is no longer available for use as normal memory. The VRAM rescue area has been removed.

Kernel buffers

The kernel buffers area provides a similar function to that of the system heap, but for more specialised tasks. It is private to the Kernel.

Abort SVC and IRQ stack copy

The Abort SVC and IRQ stack copy area is used by the Kernel to take a copy of the SVC and IRQ stacks when an abort occurs. This information is available to Privileged Backtrace Structure (PBTS) tools, such as BTSDump. During the processing of an abort within a privileged mode the dynamic area contains a copy of the entire SVC stack, followed by the entire IRQ stack. The registers and other parameters at the time of the abort can be obtained from the PBTS chain. The area is read only in USR mode, and should only be read by diagnostic tools.

This area is not resizable.

Operating system ROM

The Operating System ROM area provides an explicit description of the location of the ROM and its extent. Diagnostic tools and other specific applications may use this information to provide a logical memory map without reliance on fixed constants. The contents are read only in all modes.

This area is not resizable.

SWI dispatch and IRQ workspace

The SWI dispatch tables have been moved within the memory map due to an increase in the size of the IRQ stack. The tables are private to the Kernel and should not be manipulated by external applications except in unavoidable circumstances. Consult the OS_ReadSysInfo6 document for the defined mechanism for reading the table address. Such use is strongly discouraged.

This is the region which has previously been described as 'Cursor/System/Sound' within the Task Manager display.

This area is not resizable.

SVC stack

The SVC stack area provides an explicit description of the location of the SVC stack and its extent. This is the preferred mechanism for locating the SVC stack. The stack will remain based at a 1M boundary, but its size may increase in future versions of the operating system. Execution of code from the SVC stack is strongly discouraged. Although the stack currently remains within 26bit space on 26bit systems it may be moved to higher memory in future.

This area is not resizable.

IRQ stack

The IRQ stack area provides an explicit description of the location of the IRQ stack and its extent. This is the preferred mechanism for locating the IRQ stack. The stack will remain based at a 1M boundary, but its size may increase in future versions of the operating system. It is strongly discouraged that the IRQ stack be used for executing code. Although the stack currently remains within 26bit space on 26bit systems, it may be moved to higher memory in future.

This area is not resizable.

UND stack

The UND stack provides an explicit description of the location of the IRQ stack and its extent. This is the preferred mechanism for locating the IRQ stack. The stack will remain based at a 1M boundary, but its size may increase in future versions of the operating system. From RISC OS 4 onward it has not been possible to execute code in the UND stack.

This area is not resizable.

Level 2 Page Tables

The level 2 page table area provides an explicit description of the location of the page tables. The address of the level 1 page tables can be inferred from the address of the ROM within the level 2 page tables. Because the ROM is mapped using Level 1 page table entries of 1M each, the space which would have been occupied by its Level 2 page table entries is 'spare'. This is where the Level 1 Page Table entries are mapped. Its size will appear to be 0 because it is sparsely managed by the Kernel. Future versions of the Kernel may explicitly state the size used by the page tables.

This area is not resizable.

Operating system page tables

The operating system page tables area, or 'CAM map', provides a table of the mapping between page number and logical address. This area is not expected to be manipulated outside of the Kernel. Should such manipulation be necessary, other necessary details about the table can be read from OS_ReadSysInfo6.

This area is not resizable.

Miscellaneous notes

There is no defined ABT mode stack. All abort operations will be executed within the SVC stack, having first preserved the state of SVC mode.


This documentation is copyright 3QD Developments Ltd 2013 and may not be reproduced or published in any form without the copyright holders permission. RISC OS is subject to continuous development and improvement as such all information is reproduced by 3QD Developments Ltd in good faith and is believed to be correct at the time of publication E&OE. 3QD Developments Ltd cannot accept any liability for any loss or damage arising from the use of any information provided as part of the RISC OS Documentation.

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